Volume 4 Number 10 (Dec. 2009)
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JSW 2009 Vol.4(10): 1069-1075 ISSN: 1796-217X
doi: 10.4304//jsw.4.10.1069-1075

Design and program multi-processor platform for high-performance embedded processing

Yijun Liu, Zhenkun Li

Guangdong University of Technology, Guangzhou, China

Abstract—Modern embedded markets call for high density computing ability, making it is difficult to use just one microprocessor to meet function requirements of highperformance embedded systems. Multiple processors, including general-purpose embedded microprocessors, digital signal processors (DSPs), ASICs and FPGA hardware accelerators, are often used in these embedded systems. Not all processors in an embedded device have the same characteristics and they are asymmetric. Heterogeneous multiprocessors bring forward difficulties in both hardware and software designs. The paper addresses the issues of supporting parallelization in asymmetric multiprocessor (AMP) environment from both hardware and software sides, including cache coherence, semaphore and embedded software programming.

Index Terms—Asymmetric multi-processor, Symmetric multi-processor, Cache coherence, Parallelism programming, Program model

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Cite: Yijun Liu, Zhenkun Li, "Design and program multi-processor platform for high-performance embedded processing," Journal of Software vol. 4, no. 10, pp. 1069-1075, 2009.

General Information

  • ISSN: 1796-217X (Online)

  • Abbreviated Title: J. Softw.

  • Frequency:  Quarterly

  • APC: 500USD

  • DOI: 10.17706/JSW

  • Editor-in-Chief: Prof. Antanas Verikas

  • Executive Editor: Ms. Cecilia Xie

  • Abstracting/ Indexing: DBLP, EBSCO,
           CNKIGoogle Scholar, ProQuest,
           INSPEC(IET), ULRICH's Periodicals
           Directory, WorldCat, etc

  • E-mail: jsweditorialoffice@gmail.com

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